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ASIC Design Methodology Jobs

Browse 182 ASIC Design Methodology jobs on Inference Jobs.

41-60 of 182 jobs

2wNV

Senior Digital Design Engineer

NVIDIA

Bengaluru, Karnataka, India (On-site)
ASIC Design
Digital Design
3wNV

DFT ATPG Engineer

NVIDIA

Yokne'am, Northern District, Israel (On-site)
ASIC Design
DFT Engineering
2wD-

Design Verification Engineer, Staff

d-Matrix

Santa Clara, California, United States (Hybrid)$161.3k – $260k Yearly
ASIC Verification
Design Verification
2wOP

ASIC Firmware Engineer, Modeling

OpenAI

San Francisco, California, United States (On-site)$360k – $530k Yearly
ASIC Design
Embedded Systems
2wCE

Lead RTL Design Engineer

Cerebras

Sunnyvale, California, United States (Hybrid)$175k – $275k Yearly
ASIC Design
Chip Design
6dGR

2026 Graduate Silicon Engineer

Graphcore

Bristol, England, United Kingdom (On-site)
ASIC Design
Graduates
5dNV

Power and Performance Engineer - System Memory

NVIDIA

Santa Clara, California, United States (Hybrid)$168k – $310.5k Yearly
Electrical Engineering
Hardware Engineering
3wNV

Low Power ASIC Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$100k – $189.8k Yearly
ASIC Engineering
Design Verification
6dTE

Sr Staff Engineer, SoC RTL Design

Tenstorrent

Toronto, Ontario, Canada (Hybrid)
ASIC Design
Digital Design
4wOP

Power Architect

OpenAI

San Francisco, California, United States (On-site)$295k – $445k Yearly
Chip Design
Electrical Engineering
6dTE

Staff Design for Test Engineer

Tenstorrent

Santa Clara, California, United States (Hybrid)$100k – $500k Yearly
ASIC Engineering
Design for Test
6dNV

Senior Integration Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)
ASIC Design Engineer
EDA Engineer
2wNV

Senior GPU Floorplan Design Engineer

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
ASIC Physical Design
Floorplanning
2wNV

Senior Verification Engineer, SoC

NVIDIA

Santa Clara, California, United States (Hybrid)$136k – $264.5k Yearly
ASIC Verification
Hardware Engineering
3wNV

Senior Package Layout Engineer - Hardware

NVIDIA

Santa Clara, California, United States (Hybrid)$136k – $258.8k Yearly
ASIC Design
Electrical Engineering
2wNV

Senior Custom SOC IP Verification Engineer

NVIDIA

Shanghai, Shanghai, China (On-site)
ASIC Verification
Design Verification
2wTE

Chiplet Physical Design Engineer

Tenstorrent

United States (Remote)$100k – $500k Yearly
ASIC Design Engineer
Hardware Engineer
6dTE

Senior Physical Design Engineer

Tenstorrent

Austin, Texas, United States (Hybrid)$100k – $500k Yearly
ASIC Design
Hardware Engineering
2wNV

Senior Mask Layout Design Engineer

NVIDIA

新竹市, Hsinchu City, Taiwan (Hybrid)
Analog Layout
IC Layout
2wNV

Senior Research Scientist, AI Accelerator Design and VLSI

NVIDIA

Santa Clara, California, United States (On-site)$192k – $356.5k Yearly
AI Hardware
Hardware Engineering

Related searches

Hardware EngineeringASIC DesignSemiconductor EngineeringElectrical EngineeringSilicon EngineeringASIC VerificationDesign VerificationPhysical DesignRTL DesignSoC Verification