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Digital Logic Design Jobs

Browse 25 Digital Logic Design jobs on Inference Jobs.

25 jobs
2 wk. agoEtched logoET

RTL Intern

Etched

San Jose, California, United States (On-site)
RTL Design
ASIC Engineering
Verilog
SystemVerilog
4 wk. agoNVIDIA logoNV

Senior Digital Design Engineer

NVIDIA

Santa Clara, California, United States (On-site)$136–264.5K Yearly
Digital Design Engineering
ASIC Design
RTL Design
NVLink
3 wk. agoNVIDIA logoNV

Senior CPU Design Engineer

NVIDIA

Hillsboro, Oregon, United States (On-site)$168–310.5K Yearly
CPU Design
Hardware Engineering
Micro-architecture
RTL Design
2 wk. agoEtched logoET

RTL Design Engineer

Etched

San Jose, California, United States (On-site)$150–275K Yearly
RTL Design Engineer
ASIC Design
RTL Design
Digital Logic
3 wk. agoNVIDIA logoNV

Senior ASIC Design Engineer - Hardware

NVIDIA

Santa Clara, California, United States (On-site)$136–264.5K Yearly
ASIC Design
Hardware Engineering
ASIC Design
SoC Design
4 wk. agoNVIDIA logoNV

Software R&D Engineer, RTL Optimization Tools

NVIDIA

Santa Clara, California, United States (Hybrid)$136–218.5K Yearly
CAD Software Development
EDA Tools Development
C++
RTL Design
3 wk. agoTenstorrent logoTE

RISC-V CPU Microarchitecture / RTL

Tenstorrent

United States (Remote)$100–500K Yearly
CPU Engineering
Hardware Engineering
RISC-V
RTL Design
4 wk. agoNVIDIA logoNV

Senior ASIC Hardware Design Engineer

NVIDIA

Westford, Massachusetts, United States (On-site)$168–264.5K Yearly
ASIC Design Engineering
Hardware Engineering
Verilog
SystemVerilog
3 wk. agoEtched logoET

RTL Design Engineer

Etched

Cupertino, California, United States (On-site)
Hardware Engineering
ASIC Design
RTL Design
RTL Development
3 wk. agoNVIDIA logoNV

DFT Engineer

NVIDIA

Hyderabad, Telangana, India (On-site)
DFT Engineering
ASIC Design
Design for Test
Memory BIST
2 wk. agoEtched logoET

DFT Intern

Etched

San Jose, California, United States (On-site)
DFT Engineering
ASIC Design
DFT
Verilog
2 wk. agoEtched logoET

DV Intern

Etched

San Jose, California, United States (On-site)
Design Verification
ASIC
SystemVerilog
UVM
2 wk. agoNVIDIA logoNV

Cell Modeling and Verification Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$100–189.8K Yearly
Cell Modeling
Verification Engineering
Verilog HDL
SystemVerilog
2 wk. agoEtched logoET

PD Intern

Etched

San Jose, California, United States (On-site)
Physical Design
ASIC Design
Physical Design
ASIC Design
2 wk. agoNVIDIA logoNV

Senior Silicon Systems Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$168–310.5K Yearly
Silicon Engineering
Hardware Engineering
Semiconductor Bringup
Computer Architecture
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