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Silicon Validation Jobs

Explore Silicon Validation roles on Inference Jobs and apply today.

3mo agoGR

DFT Engineer

Graphcore

Bristol, England, United Kingdom (On-site)
Engineering - Silicon
DFT Engineering
DFT
JTAG
2mo agoCE

Advanced Packaging Technologist & Lead

Cerebras

Sunnyvale, California, United States (On-site)$175K – $275K Yearly
Semiconductor Packaging
Advanced Packaging
Semiconductor Packaging
2.5D/3D Stacking
1mo agoTE

SOC Emulation Engineer - Hardware Emulation Infrastructure

Tenstorrent

Santa Clara, California, United States (Hybrid)$100K – $500K Yearly
SoC
Hardware Engineering
Python
C++
1mo agoCE

Manufacturing Bring-up Engineer L2

Cerebras

Sunnyvale, California, United States (On-site)$170K – $230K Yearly
Manufacturing Engineering
Hardware Engineering
Hardware Bring-up
ASIC
2mo agoNV

ASIC Design Engineer, Clocks

NVIDIA

Shanghai, Shanghai, China (On-site)
ASIC Design
VLSI Design
ASIC Design
Verilog
1mo agoTE

Staff Design for Test STA Engineer

Tenstorrent

Santa Clara, California, United States (Hybrid)$100K – $500K Yearly
DFT Engineering
STA Engineering
Design for Test
Static Timing Analysis
3mo agoNV

Senior Tegra Diagnostic Software Engineer

NVIDIA

Santa Clara, California, United States (On-site)$184K – $356.5K Yearly
Software Engineering
Systems Engineering
C/C++ Programming
Object-Oriented Programming
3mo agoNV

Systems Software Engineer - Tegra

NVIDIA

Santa Clara, California, United States (On-site)$124K – $241.5K Yearly
Systems Software
Embedded Software
C/C++
Linux Kernel
3mo agoD-

FPGA Design Engineer, Senior Staff

d-Matrix

Santa Clara, California, United States (Hybrid)$142.5K – $237.5K Yearly
R&D - HW Silicon Design
FPGA Engineering
FPGA Design
FPGA Verification
2mo agoNV

Senior Test Methodology Engineer

NVIDIA

Santa Clara, California, United States (On-site)$132K – $253K Yearly
Test Engineering
Hardware Engineering
ATE Testing
Advantest 93K
2mo agoNV

Senior VLSI Integration Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (Hybrid)
VLSI
ASIC Engineering
VLSI
ASIC
3mo agoOP

RTL & Co-design Engineer (junior)

OpenAI

San Francisco, California, US$250K – $460K Yearly
Hardware
ASIC Design
Verilog
SystemVerilog
2mo agoNV

Senior Performance Verification Engineer

NVIDIA

Santa Clara, California, United States (On-site)$136K – $264.5K Yearly
Hardware Engineering
CPU Verification
CPU Performance Verification
Performance Correlation
3mo agoD-

Senior Staff DFT MBIST Engineer

d-Matrix

Bengaluru, Karnataka, India (Hybrid)
R&D - HW Silicon Design
DFT Engineering
DFT
MBIST
3mo agoNV

Senior ASIC RTL Integration and Netlisting Engineer

NVIDIA

Santa Clara, California, United States (On-site)$136K – $264.5K Yearly
ASIC Design Engineer
Physical Design Engineer
ASIC
RTL Integration
1w agoD-

Systems Hardware Engineer, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$150K – $300K Yearly
R&D - HW Systems Engineering
Hardware Design Engineering
PCIe Gen5/6
CXL