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IJTAG Jobs

Explore IJTAG roles on Inference Jobs and apply today.

3mo agoGR

DFT Engineer

Graphcore

Bristol, England, United Kingdom (On-site)
Engineering - Silicon
DFT Engineering
DFT
JTAG
1mo agoTE

Staff Design for Test STA Engineer

Tenstorrent

Santa Clara, California, United States (Hybrid)$100K – $500K Yearly
DFT Engineering
STA Engineering
Design for Test
Static Timing Analysis
5d agoTE

Staff Engineer, SoC - DFD Design Verification

Tenstorrent

Boston, Massachusetts, United States (Hybrid)$100K – $500K Yearly
Design Verification
SoC
UVM
DFT
2mo agoCO

Firmware Engineer

CoreWeave

Livingston, New Jersey, United States (Hybrid)$109K – $160K Yearly
Firmware Engineering
Embedded Systems
C/C++
OpenBMC
4w agoCO

Senior Firmware Engineer

CoreWeave

Livingston, New Jersey, United States (Hybrid)$153K – $242K Yearly
Firmware Engineering
Embedded Systems
OpenBMC
C++
2mo agoNV

Senior DFX Methodology Engineer

NVIDIA

Santa Clara, California, US$136K – $218.5K Yearly
DFT Engineer
ASIC Design
DFT
JTAG
3w agoGR

Board Test Engineer

Graphcore

Bristol, England, United Kingdom (On-site)
Board Test Engineering
Hardware Test
JTAG
Boundary Scan
2w agoNV

DFT Engineer

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
DFT Engineering
ASIC Design
DFT
Memory BIST
1d agoNV

Offensive Hardware Security Researcher

NVIDIA

Santa Clara, California, United States (On-site)$184K – $356.5K Yearly
Offensive Security Research
Hardware Security
ARM/RISC-V Assembly
Verilog
4w agoTE

Staff, Design for Test Engineer (DFT)

Tenstorrent

Bengaluru, Karnataka, India (Hybrid)
DFT Engineer
ASIC Design
DFT
ATPG
3w agoTE

Design for Test Engineer

Tenstorrent

Santa Clara, California, United States (Hybrid)$100K – $500K Yearly
DFT and Test
ASIC Engineering
DFT
RTL
3mo agoTE

Engineer, PCIe Validation

Tenstorrent

Vancouver, British Columbia, Canada (Hybrid)
Hardware Engineering
Validation Engineering
PCIe
Firmware
1mo agoGR

Staff UEFI Engineer

Graphcore

Austin, Texas, United States (On-site)
Firmware Engineering
UEFI Development
UEFI
TianoCore
3w agoNV

DFT Engineer

NVIDIA

Hyderabad, Telangana, India (Hybrid)
DFT Engineering
ASIC Design
Design for Test
Memory BIST