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Cerebras Wafer-Scale Engine Jobs

Explore Cerebras Wafer-Scale Engine roles on Inference Jobs and apply today.

4w agoCE

LLVM Compiler Engineer

Cerebras

Sunnyvale, California, United States (On-site)
Compiler Engineering
Systems Programming
LLVM
C++
5d agoGR

Staff Bring-Up and Characterisation Engineer

Graphcore

Austin, Texas, United States (On-site)$198.1K – $268K Yearly
Bring-Up & Characterisation
Hardware Engineering
Python
JMP
4d agoNV

Senior Design Engineer, Coherent High Speed Interconnect

NVIDIA

Santa Clara, California, United States (On-site)$168K – $310.5K Yearly
Hardware Engineering
ASIC Design
Verilog
System Verilog
2mo agoCE

Electrical Engineer

Cerebras

Sunnyvale, California, United States (On-site)$150K – $260K Yearly
Electrical Engineering
Hardware Engineering
Printed Circuit Board Design
Schematic Design
3w agoCE

Compiler Engineer

Cerebras

Sunnyvale, California, United States (On-site)
Compiler Engineering
Compiler Developer
Compilers
C++
2mo agoCE

Inference Frontend

Cerebras

Sunnyvale, California, United States (On-site)
Software Engineering
Artificial Intelligence
C++
Compilers
2mo agoNV

Senior Memory Mask Designer

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
VLSI Design
Physical Design
IC Layout
CMOS
1mo agoCE

Software Engineer, Kernel Reliability

Cerebras

Sunnyvale, California, United States (On-site)
Software Engineering
Kernel Development
C++
Python
3mo agoCE

Senior Runtime Engineer

Cerebras

Sunnyvale, California, United States (On-site)
Software Engineer
Distributed Systems
C/C++
Distributed Systems
4w agoCE

Performance Engineer

Cerebras

Toronto, Ontario, Canada (On-site)
Performance Engineering
Software Engineering
C/C++
Python
2mo agoNV

Senior Software R&D Engineer, VLSI Physical Design

NVIDIA

Santa Clara, California, United States (Hybrid)$168K – $264.5K Yearly
Physical Design Engineer
VLSI Engineer
VLSI Physical Design
C++
2mo agoCE

Senior/Staff Engineer : Post Silicon- Bring Up

Cerebras

Bengaluru, Karnataka, India (On-site)$175K – $275K Yearly
Silicon
ASIC Engineering
Python
Verilog