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Cadence Tempus Jobs

Browse 36 Cadence Tempus jobs on Inference Jobs.

21-36 of 36 jobs

2wD-

Analog Design Engineer, Senior Staff

d-Matrix

Santa Clara, California, United States (Hybrid)$196k – $300k Yearly
Analog Design
Hardware Engineering
2wNV

CAD Layout Design Engineer

NVIDIA

Bengaluru, Karnataka, India (On-site)
Analog Layout
CAD Engineering
2wNV

Senior Physical Methodology Design Engineer

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
ASIC Design
Design Methodology
6dNV

Signoff Methodology Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$116k – $218.5k Yearly
Hardware Engineering
Methodology Engineering
2wNV

Electronic Design Automation Intern - 2026

NVIDIA

新竹市, Hsinchu City, Taiwan (On-site)
EDA Engineer
Electronic Design Automation Intern
6dTE

Senior Physical Design Engineer

Tenstorrent

Austin, Texas, United States (Hybrid)$100k – $500k Yearly
ASIC Design
Hardware Engineering
3wTE

SoC Top-Level Physical Design Engineer

Tenstorrent

Austin, Texas, United States (Hybrid)$100k – $500k Yearly
Hardware Engineering
Physical Design
1wNV

Senior Hardware Time Synchronization Architect

NVIDIA

Yokne'am, Northern District, Israel (On-site)
Hardware Architecture
Hardware Engineering
4wNV

ASIC Timing Engineer

NVIDIA

Santa Clara, California, United States (On-site)$116k – $218.5k Yearly
ASIC Engineering
Hardware Engineering
2wNV

ASIC Clocks Verification Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$116k – $218.5k Yearly
ASIC Verification
Design Verification
2wNV

ASIC Physical Design and Timing Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$116k – $218.5k Yearly
ASIC Engineer
ASIC Physical Design Engineer
6dTE

Staff Technical Program Manager, Physical Engineering

Tenstorrent

Santa Clara, California, United States (Hybrid)$100k – $500k Yearly
Hardware Engineering
Physical Engineering
3wNV

ASIC Design Engineer, Clocks

NVIDIA

Shanghai, Shanghai, China (On-site)
ASIC Design
Digital IC Design
6dTE

Physical Design Engineer - STA

Tenstorrent

Austin, Texas, United States (Hybrid)$100k – $500k Yearly
ASIC Design
Hardware Engineering
2wCR

Senior Integrated Master Scheduler

Crusoe

Denver, Colorado, United States (On-site)$87.5k – $100k Yearly
Construction Scheduler
EPC Scheduler
6dCE

AI Silicon Circuit Simulation Engineer

Cerebras

Sunnyvale, California, United States (On-site)
Analog Design
Circuit Design

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