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SystemVerilog Jobs in Santana Row, California, United States

Browse 9 SystemVerilog jobs in Santana Row, California, United States on Inference Jobs.

9 jobs
4w agoOpenAI logoOP

Design Verification Engineer

OpenAI

San Francisco, California, US or Remote (Worldwide)$226K – $445K Yearly
Hardware Engineering
Design Verification
Design Verification
SystemVerilog
4w agoCerebras logoCE

Design Verification Engineer- Tile

Cerebras

United States (Remote)$120K – $240K Yearly
Design Verification
Hardware Engineering
SystemVerilog
UVM
9h agoEtched logoET

DV Intern

Etched

San Jose, California, United States (On-site)
Design Verification
asic
SystemVerilog
UVM
1w agoTenstorrent logoTE

RISC-V CPU Microarchitecture / RTL

Tenstorrent

United States (Remote)$100K – $500K Yearly
CPU Engineering
Hardware Engineering
RISC-V
RTL Design
2w agoOpenAI logoOP

Hardware Tools Engineer

OpenAI

United States (Remote)$225K – $445K Yearly
Hardware Engineering
Software Engineering
Rust
C++
6d agoCerebras logoCE

AI Silicon Physical Design Engineer

Cerebras

California, United States + 1 more (Remote)$150K – $250K Yearly
Physical Design Engineering
ASIC Design
Physical Design
Physical Verification
4w agoNVIDIA logoNV

Senior Formal Verification Engineer - LPU

NVIDIA

Worldwide (Remote)
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