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SOC Timing Closure Jobs

Explore SOC Timing Closure roles on Inference Jobs and apply today.

3w agoET

ASIC Timing Engineer

Etched

Cupertino, California, United States (On-site)
Hardware Engineering
ASIC Design
ASIC Timing
Static Timing Analysis (STA)
3mo agoTE

SoC Top-Level Physical Design Engineer

Tenstorrent

Austin, Texas, United States (Hybrid)$100K – $500K Yearly
Physical Design
SoC Engineering
SoC Physical Design
Floorplanning
4w agoTE

Physical Design Engineer - STA

Tenstorrent

Austin, Texas, United States (Hybrid)$100K – $500K Yearly
Physical Design
ASIC Design
STA
Physical Design
3mo agoNV

ASIC Timing Engineer

NVIDIA

Santa Clara, California, United States (On-site)$116K – $218.5K Yearly
ASIC Engineering
Hardware Engineering
Static Timing Analysis
Timing Convergence
3w agoNV

SOC Verification Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (Hybrid)
Hardware Engineering
ASIC Verification
RTL Design
Verilog
6d agoTE

Sr Staff Engineer, SoC RTL Design

Tenstorrent

Toronto, Ontario, Canada (Hybrid)
ASIC Design
Digital Design
RISC-V
SoC Design
2mo agoNV

Senior Timing Methodology Engineer, Custom Circuits

NVIDIA

Santa Clara, California, United States (On-site)$168K – $310.5K Yearly
Hardware Engineering
ASIC Design
ASIC Design
Timing Analysis
3mo agoNV

Senior ASIC Timing Engineer

NVIDIA

Westford, Massachusetts, United States (On-site)$168K – $310.5K Yearly
ASIC Engineer
Timing Engineer
Static Timing Analysis (STA)
Physical Design
5h agoTE

AI Subsystems Physical Design Lead

Tenstorrent

Austin, Texas, United States (Hybrid)$100K – $500K Yearly
Physical Design Engineer
ASIC Design
Physical Design
Synthesis
2w agoNV

ASIC Floorplan Design Engineer

NVIDIA

Shanghai, Shanghai, China (On-site)
ASIC Design
Physical Design
ASIC Design
SoC
3mo agoTE

SoC Physical Design Verification Engineer

Tenstorrent

Austin, Texas, United States (Hybrid)$100K – $500K Yearly
Physical Design
Physical Design Verification
SoC Physical Verification
DRC