System-Verilog UVM Jobs
Browse 43 System-Verilog UVM jobs on Inference Jobs.
43 jobs
8h agoNV
Chip Design Verification and Emulation Engineer
NVIDIA
Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)
3w agoD-
HW Design Verification Intern
d-Matrix
Santa Clara, California, United States (Hybrid)$30 – $60 Yearly
3w agoCE
8h agoTE
Design for Test Engineer
Tenstorrent
Santa Clara, California, United States (Hybrid)$100k – $500k Yearly
3w agoTE
Sr. Staff Engineer, SoC RTL Design - Fabric
Tenstorrent
Toronto, Ontario, Canada (Hybrid)$100k – $500k Yearly
3w agoNV
Senior Verification Engineer
NVIDIA
Santa Clara, California, United States (On-site)$136k – $218.5k Yearly
3w agoNV
Senior Systems Prototyping Engineer
NVIDIA
Santa Clara, California, United States (On-site)$168k – $310.5k Yearly
4w agoTE