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Semiconductor Workflows Jobs

Browse 186 Semiconductor Workflows jobs on Inference Jobs.

161-180 of 186 jobs
4w agoDE

GTM Engineer

Decagon

New York, New York, United States (On-site)$200k – $280k Yearly
Go To Market
GTM Strategy
4d agoNV

Senior STA Engineer, Sub-Chip

NVIDIA

Yokne'am, Northern District, Israel (On-site)
ASIC Design
Hardware Engineering
3w agoNV

Senior Software Engineer - GPU and SOC

NVIDIA

Santa Clara, California, United States (On-site)$152k – $287.5k Yearly
Embedded Software Engineering
Firmware Engineering
3w agoNV

Senior Silicon Photonics Equipment Engineer

NVIDIA

Yokne'am, Northern District, Israel (On-site)
Equipment Engineer
Manufacturing Engineer
2w agoNV

CPU Verification Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$100k – $189.8k Yearly
CPU Verification
Design Verification
2w agoNV

Senior CAD Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$168k – $310.5k Yearly
CAD Engineering
EDA Engineering
2w agoNV

Manager, SOC Modelling

NVIDIA

Santa Clara, California, United States (On-site)$224k – $431.3k Yearly
Computer Architecture
Engineering Management
4d agoNV

Senior Software Developer

NVIDIA

Santa Clara, California, United States (On-site)$168k – $270.3k Yearly
Backend Development
Data Engineering
2w agoNV

Memory Mask Design Engineer

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
Hardware Engineering
IC Layout
2w agoTE

Staff, Design for Test Engineer (DFT)

Tenstorrent

Bengaluru, Karnataka, India (Hybrid)
ASIC Design
DFT Engineer
3w agoNV

Senior HSIO Validation Engineer

NVIDIA

臺北市, Taipei, Taiwan (On-site)
ASIC Verification
Electrical Engineering
6d agoNV

Senior Systems Prototyping Engineer

NVIDIA

Santa Clara, California, United States (On-site)$168k – $310.5k Yearly
ASIC Engineering
FPGA Engineering
3w agoNV

Silicon Power Engineer

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
Hardware Engineering
Power Engineering
3w agoNV

Senior DFX Methodology Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$136k – $218.5k Yearly
ASIC Design
DFT Engineer
2w agoTE

Staff Design for Test Engineer

Tenstorrent

Santa Clara, California, United States (Hybrid)$100k – $500k Yearly
ASIC Engineering
Design for Test