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RTL-to-GDS Jobs

Browse 90 RTL-to-GDS jobs on Inference Jobs.

90 jobs

6dTE

Physical Design Engineer, Multi Voltage / Power Grid Construction

Tenstorrent

Santa Clara, California, United States (Hybrid)$100k – $500k Yearly
Hardware Engineering
IC Design
3wTE

Physical Design Flow Engineer

Tenstorrent

Santa Clara, California, United States (Hybrid)$100k – $500k Yearly
CAD Engineering
Physical Design Engineering
3wTE

Staff Engineer, ASIC Design Methodology

Tenstorrent

Boston, Massachusetts, United States (Hybrid)$100k – $500k Yearly
ASIC Design
ASIC Engineering
4wNV

Formal Equivalence Checking Methodology Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$136k – $264.5k Yearly
ASIC Verification
CAD Engineering
4dNV

Senior AI Verification Chip Design Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)
AI Engineering
Chip Design
2wOP

RTL & Co-design Engineer (junior)

OpenAI

San Francisco, California, United States (Hybrid)$250k – $460k Yearly
ASIC Design
Hardware
6dGR

2026 Graduate Silicon Engineer

Graphcore

Cambridge, England, United Kingdom (On-site)
ASIC Design
Graduate Engineer
2wNV

Senior Physical Methodology Design Engineer

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
ASIC Design
Design Methodology
4wNV

Physical Design Engineer

NVIDIA

Westford, Massachusetts, United States (On-site)$116k – $218.5k Yearly
ASIC Design
Hardware Engineering
4wNV

Senior Physical Design Engineer

NVIDIA

Westford, Massachusetts, United States (On-site)$136k – $264.5k Yearly
ASIC Design
Hardware Engineering
5dNV

Senior ASIC Design Engineer - Hardware

NVIDIA

Austin, Texas, United States (Hybrid)$136k – $264.5k Yearly
ASIC Design
Hardware Engineering
2wNV

ASIC RTL Integration and Netlisting Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$100k – $189.8k Yearly
ASIC Engineering
Hardware Engineering
2wOP

RTL & Codesign Engineer

OpenAI

San Francisco, California, United States (Hybrid)$250k – $460k Yearly
ASIC Design
Computer Architecture
6dNV

RTL Design Engineer, DFT

NVIDIA

Yokneam Ilit, Northern District, Israel (On-site)
ASIC Design
DFT Engineering
2wNV

Senior ASIC Design and STA Engineer

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
ASIC Engineering
Hardware Engineering
2wD-

Micro-Architect / RTL Design - CPU, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$196k – $300k Yearly
ASIC Design
CPU Design
2wCE

Lead RTL Design Engineer

Cerebras

Sunnyvale, California, United States (Hybrid)$175k – $275k Yearly
ASIC Design
Chip Design
4wNV

Senior RTL Analysis Methodology Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$136k – $264.5k Yearly
ASIC Engineering
Hardware Engineering
3wTE

RISC-V CPU Microarchitecture / RTL

Tenstorrent

United States (Remote)$100k – $500k Yearly
CPU
Digital Design
2wNV

Circuit Silicon Correlation DFT Engineer

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
ASIC Design
DFT Engineering

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