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DFT (Design for Testability) Jobs

Browse 40 DFT (Design for Testability) jobs on Inference Jobs.

21-40 of 40 jobs

1wNV

Physical Design Engineer

NVIDIA

新竹市, Hsinchu City, Taiwan (On-site)
ASIC Design
Hardware Engineering
2wNV

ASIC Clocks Verification Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$116k – $218.5k Yearly
ASIC Verification
Design Verification
6dTE

Sr. Staff Product Development Engineer - Test Methodology Engineer

Tenstorrent

Santa Clara, California, United States (Hybrid)$100k – $500k Yearly
Hardware Engineering
Product Development Engineering
1wFI

Manufacturing Test Engineer, PCBA

Figure

San Jose, California, United States (On-site)$160k – $250k Yearly
Hardware Test
Manufacturing Engineer
3wNV

Senior ASIC Design Verification Engineer

NVIDIA

California, United States (Hybrid)$168k – $310.5k Yearly
ASIC Verification
Design Verification
2wSE

Test Engineer, Manufacturing

Sesame

San Francisco, California, United States (On-site)$175k – $280k Yearly
Hardware Operations
Hardware Test Engineer
3wD-

Principal ATE Test Engineer

d-Matrix

Santa Clara, California, United States (Hybrid)$161.3k – $268.8k Yearly
ATE Test Engineering
Hardware Engineering
3wCE

Lead RTL Design Engineer

Cerebras

Sunnyvale, California, United States (Hybrid)$175k – $275k Yearly
ASIC Design
Chip Design
3wNV

ASIC Design Engineer, Clocks

NVIDIA

Shanghai, Shanghai, China (On-site)
ASIC Design
Digital IC Design
1wTE

Physical Design Engineer - STA

Tenstorrent

Austin, Texas, United States (Hybrid)$100k – $500k Yearly
ASIC Design
Hardware Engineering
4wTE

Staff Engineer, ASIC Design Methodology

Tenstorrent

Boston, Massachusetts, United States (Hybrid)$100k – $500k Yearly
ASIC Design
ASIC Engineering
3wNV

Senior Reliability Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$168k – $264.5k Yearly
Component Engineering
Hardware Engineering
1wNV

Senior ASIC Physical Design Engineer, Cache Coherent Interconnects

NVIDIA

Santa Clara, California, United States (Hybrid)$136k – $264.5k Yearly
ASIC Design
ASIC Physical Design
4wTE

Silicon Validation Engineer

Tenstorrent

Santa Clara, California, United States (On-site)$100k – $500k Yearly
Electrical Engineering
Hardware Engineering
3wVE

Associate Engineer Mechanical Engineering VIII

Vertiv

Westerville, Ohio, United States (On-site)
Data Center Engineering
Mechanical Engineering
1wNV

Senior Custom Silicon Design Engineer

NVIDIA

Shanghai, Shanghai, China (On-site)
ASIC Design
Hardware Engineering
1wNV

Senior Director, PCB and PCBA Group Leader

NVIDIA

Santa Clara, California, United States (On-site)$292k – $442.8k Yearly
Engineering Management
Hardware Engineering
2wNV

Senior ASIC Design and STA Engineer

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
ASIC Engineering
Hardware Engineering
1wNV

Senior Bring up Methodology Lead

NVIDIA

Santa Clara, California, United States (Hybrid)$196k – $368k Yearly
Hardware Engineering
NPI Management
1wNV

Senior VLSI Integration Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (Hybrid)
ASIC Engineering
Hardware Engineering

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