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Design of Experiments (DoE) Jobs

Browse 348 Design of Experiments (DoE) jobs on Inference Jobs.

241-260 of 348 jobs

2wFI

Systems Integration Engineer - Hand Subsystem

Figure

San Jose, California, United States (On-site)$150k – $250k Yearly
Controls Engineering
Mechanical Engineering
1wNV

Physical Design Engineer

NVIDIA

新竹市, Hsinchu City, Taiwan (On-site)
ASIC Design
Hardware Engineering
3wNV

Senior ASIC Design Engineer

NVIDIA

Canada, Remote, Canada (Hybrid)C$155k – C$245k Yearly
ASIC Design
Digital Design
4wFI

Validation Engineer – Mechanical Systems

Figure

San Jose, California, United States (On-site)$150k – $250k Yearly
Mechanical Engineer
Robotics
2dSA

Hardware Design Engineer

SambaNova

United States (Remote)
ASIC Design
Computer Engineering
5dCE

Design Verification Engineer- Tile

Cerebras

United States (Remote)$120k – $240k Yearly
ASIC Verification
Design Verification
7dTE

Staff Analog Design Engineer

Tenstorrent

United States (Remote)$100k – $500k Yearly
Analog Design
Hardware Engineering
4wTE

Chiplet Physical Design Engineer

Tenstorrent

東京都, Tokyo Prefecture, Japan (Hybrid)
Hardware Engineering
IC Design
2wCR

Electrical Project Development Engineer

Crusoe

Denver, Colorado, United States (On-site)$140k – $180k Yearly
Electrical Engineering
Energy Engineering
2wAN

Design Engineer, Web

Anthropic

San Francisco, California, United States (Hybrid)$190k – $260k Yearly
Creative Technology
Design Engineering
1wNV

ASIC Design Engineer, High Speed IO

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
ASIC Design
Digital Design
1wTE

Staff, Design for Test Engineer (DFT)

Tenstorrent

Bengaluru, Karnataka, India (Hybrid)
ASIC Design
DFT Engineer
1wNV

Senior SoC Methodology Architect, VLSI Physical Design

NVIDIA

Santa Clara, California, United States (Hybrid)$136k – $218.5k Yearly
Engineering
Hardware Engineering
1wCE

3D Physical Design Engineer

Cerebras

Sunnyvale, California, United States (On-site)$150k – $270k Yearly
3D Integration
ASIC Design
6dD-

Analog IC Design Intern

d-Matrix

Santa Clara, California, United States (Hybrid)$30 – $60 Yearly
Analog IC Design
Electrical Engineering
2wOP

RTL & Co-design Engineer (junior)

OpenAI

San Francisco, California, United States (Hybrid)$250k – $460k Yearly
ASIC Design
Hardware
1wNV

Senior Calibre CAD Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$136k – $264.5k Yearly
CAD Engineering
Design Automation
4dNV

ASIC Floorplan Design Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$100k – $189.8k Yearly
ASIC Design Engineer
Entry Level Hardware Engineer
2wOP

Developer Experience Engineer

OpenAI

San Francisco, California, United States (On-site)$280k – $345k Yearly
Developer Experience
Developer Relations
5dFI

Engineering Test Technician

Figure

San Jose, California, United States (On-site)$45 – $70 Hourly
Hardware Testing
Quality Assurance

Related searches

Hardware EngineeringASIC DesignPhysical DesignSemiconductor EngineeringVLSIVLSI DesignDigital DesignElectrical EngineeringRoboticsRTL Design