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ASIC Design Verification Jobs

Explore ASIC Design Verification roles on Inference Jobs and apply today.

3w agoTE

Design for Test Engineer

Tenstorrent

Santa Clara, California, United States (Hybrid)$100K – $500K Yearly
DFT and Test
ASIC Engineering
DFT
RTL
3mo agoOP

Physical Design Engineer

OpenAI

San Francisco, California, United States (On-site)$310K – $460K Yearly
Hardware
Physical Design
Physical Design
Silicon Implementation
3w agoNV

DFT Engineer

NVIDIA

Hyderabad, Telangana, India (Hybrid)
DFT Engineering
ASIC Design
Design for Test
Memory BIST
4w agoTE

Staff, Design for Test Engineer (DFT)

Tenstorrent

Bengaluru, Karnataka, India (Hybrid)
DFT Engineer
ASIC Design
DFT
ATPG
3w agoET

PCB Hardware Validation Engineer

Etched

Cupertino, California, United States (On-site)
Hardware
Hardware Engineering
PCB
PCIe
2mo agoD-

Digital Design Engineer, Micro-Architect, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$180K – $300K Yearly
R&D - HW Silicon Design
ASIC Design
Micro-architecture
RTL Design
2mo agoTE

Network ASIC Designer

Tenstorrent

North America (Remote)$100K – $500K Yearly
Architecture
ASIC Design
ASIC Design
Network Architecture
2mo agoNV

Senior Integration Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)
ASIC Design Engineer
Frontend Engineer
Front-end Integration
ASIC Design
2w agoNV

Senior Design Engineer, Chip Design

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)
Hardware Engineering
Chip Design
RTL Design
RTL Verification
2mo agoD-

Analog IC Design Intern

d-Matrix

Santa Clara, California, United States (Hybrid)$30 – $60 Yearly
Electrical Engineering
Analog IC Design
Analog IC Design
Cadence Virtuoso
3mo agoOP

RTL & Codesign Engineer

OpenAI

San Francisco, California, United States (Hybrid)$250K – $460K Yearly
Hardware Engineering
RTL Design
Verilog
SystemVerilog
3mo agoD-

FPGA Design Engineer, Senior Staff

d-Matrix

Santa Clara, California, United States (Hybrid)$142.5K – $237.5K Yearly
R&D - HW Silicon Design
FPGA Engineering
FPGA Design
FPGA Verification
3mo agoD-

Micro-Architect / RTL Design - CPU, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$196K – $300K Yearly
Micro-architecture
RTL Design
Micro-architecture
RTL Design