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Package Design Engineering Jobs

Browse 2,331 Package Design Engineering jobs on Inference Jobs.

201-220 of 2,331 jobs

2wOP

RTL & Co-design Engineer (junior)

OpenAI

San Francisco, California, United States (Hybrid)$250k – $460k Yearly
ASIC Design
Hardware
6dTE

Staff Product Development Engineer - ATE Content Developer

Tenstorrent

Austin, Texas, United States (Hybrid)$100k – $500k Yearly
DFT
Hardware Engineering
2wOP

Platform Engineer, Forward Deployed Engineering

OpenAI

San Francisco, California, United States (Hybrid)$230k – $385k Yearly
DevOps
Forward Deployed Engineering
2wMO

Senior Product Designer

Modal

New York, New York, United States (On-site)$150k – $250k Yearly
Product Design
Senior Product Designer
1wNV

Tapeout Mask Design Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$104k – $207k Yearly
Layout Design
Mask Design
3wNV

Senior ASIC Design Verification Engineer

NVIDIA

California, United States (Hybrid)$168k – $310.5k Yearly
ASIC Verification
Design Verification
1wCR

Staff Instrumentation & Controls Engineer

Crusoe

Denver, Colorado, United States (On-site)$148k – $170k Yearly
Automation Engineering
Controls Engineering
2wSE

Product Designer

Sesame

San Francisco, California, United States (On-site)$175k – $280k Yearly
Design Systems
Interaction Design
3wNV

Senior System Level Product Engineer

NVIDIA

臺北市, Taipei, Taiwan (On-site)
Hardware Engineering
Product Engineering
3wD-

Digital Design Engineer, Micro-Architect, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$180k – $300k Yearly
ASIC Design
Digital IC Design
3wNE

Data Center Design Lead

Nebius

United States (Remote)
Critical Facilities Engineering
Data Center Design
1wNV

Circuit Design Engineer

NVIDIA

Shanghai, Shanghai, China (On-site)
ASIC Design
Circuit Design
2wHA

Engineering Manager, Frontend Platform

Harvey

San Francisco, California, United States (On-site)$250k – $300k Yearly
Engineering Management
Frontend Architecture
3wDE

GTM Engineer

Decagon

New York, New York, United States (On-site)$200k – $280k Yearly
Go To Market
GTM Strategy
1wAC

Product Engineer

Applied Compute

San Francisco, California, United States (On-site)
AI Engineering
Full-Stack Development
3wNV

Senior Mask Layout Design Engineer

NVIDIA

新竹市, Hsinchu City, Taiwan (Hybrid)
Analog Layout
IC Layout
1wTE

Sr. Engineer, SoC Design Verification – AI/ML Accelerator Chiplets

Tenstorrent

Toronto, Ontario, Canada (Hybrid)
ASIC Verification
Design Verification
2wSE

Audio System TPM

Sesame

臺北市, Taipei, Taiwan (On-site)
Audio Engineering
Hardware Engineering
3wSC

Engineering Manger, GenAI

Scale

San Francisco, California, United States (Hybrid)$216.2k – $270.3k Yearly
Artificial Intelligence
Engineering Management
1wCR

Senior Engineering Manager, Data Plane Systems

Crusoe

San Francisco, California, United States (On-site)$237.6k – $288k Yearly
Cloud Engineering
Engineering Management

Related searches

Hardware EngineeringSemiconductor EngineeringSoftware EngineeringASIC DesignEngineering ManagementPlatform EngineeringProduct EngineeringSilicon EngineeringASIC VerificationData Center Engineering