1. Home
  2. Jobs
  3. PLL Design

PLL Design Jobs

Browse 194 PLL Design jobs on Inference Jobs.

194 jobs

1wD-

Analog Design Engineer, Staff

d-Matrix

Santa Clara, California, United States (Hybrid)$155k – $250k Yearly
1wD-

Analog Design Engineer, Senior Staff

d-Matrix

Santa Clara, California, United States (Hybrid)$196k – $300k Yearly
2dD-

Analog IC Design Intern

d-Matrix

Santa Clara, California, United States (Hybrid)$30 – $60 Yearly
3dTE

Staff Analog Design Engineer

Tenstorrent

United States (Remote)$100k – $500k Yearly
2wNV

Senior Mask Layout Design Engineer

NVIDIA

新竹市, Hsinchu City, Taiwan (Hybrid)
5dTE

Staff Mixed Signal Design Engineer, Silicon Validation

Tenstorrent

Santa Clara, California, United States (On-site)$100k – $500k Yearly
1wD-

Micro-Architect / RTL Design - CPU, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$196k – $300k Yearly
2wOP

RTL & Co-design Engineer (junior)

OpenAI

San Francisco, California, United States (Hybrid)$250k – $460k Yearly
2wCE

Lead RTL Design Engineer

Cerebras

Sunnyvale, California, United States (Hybrid)$175k – $275k Yearly
4dTE

SoC - Chiplet Design Lead

Tenstorrent

Toronto, Ontario, Canada (Hybrid)$100k – $500k Yearly
2wNV
5dNV

RTL Design Engineer, DFT

NVIDIA

Yokneam Ilit, Northern District, Israel (On-site)
5dNV

ASIC Design Engineer, High Speed IO

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
5dTE

Sr Staff Engineer, SoC RTL Design

Tenstorrent

Toronto, Ontario, Canada (Hybrid)
5dNV

Senior SoC Methodology Architect, VLSI Physical Design

NVIDIA

Santa Clara, California, United States (Hybrid)$136k – $218.5k Yearly
5dTE

Physical Design Engineer, Multi Voltage / Power Grid Construction

Tenstorrent

Santa Clara, California, United States (Hybrid)$100k – $500k Yearly
59mNV

ASIC Floorplan Design Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$100k – $189.8k Yearly
2wNV

Senior Digital Design Engineer

NVIDIA

Bengaluru, Karnataka, India (On-site)