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3mo agoSE

Audio Systems Engineer

Sesame

San Francisco, California, United States (On-site)$175K – $280K Yearly
Audio Engineering
Hardware Engineering
Audio Hardware Development
DSP Techniques
2mo agoD-

Digital Design Engineer, Micro-Architect, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$180K – $300K Yearly
R&D - HW Silicon Design
ASIC Design
Micro-architecture
RTL Design
3mo agoSE

Electrical Engineer

Sesame

San Francisco, California, United States (On-site)$175K – $280K Yearly
Electrical Engineering
Hardware Engineering
Electrical Engineering
PCB Design
1mo agoD-

Manager, Software Engineering-Kernels

d-Matrix

Santa Clara, California, United States (Hybrid)
Software Engineering Management
Systems Programming
C++
Python
3mo agoD-

Software Engineer, Staff - Kernels

d-Matrix

Santa Clara, California, United States (Hybrid)$180K – $300K Yearly
Kernel Development
AI Compiler Engineering
C/C++
Python
3mo agoOP

Software Engineer - Sensing, Consumer Products

OpenAI

San Francisco, California, United States (Hybrid)$325K – $325K Yearly
Software Engineer
Embedded Software Engineer
Python
RTOS
3mo agoSE

Embedded Engineer

Sesame

San Francisco, California, United States (On-site)$175K – $280K Yearly
Embedded Systems
Firmware Engineering
Embedded Systems
C/C++
1mo agoCO

Sr. Data Scientist - Capacity Data

CoreWeave

Livingston, New Jersey, United States (Hybrid)$143K – $210K Yearly
Data Science
Data Engineering
Data Science
Data Engineering
3mo agoD-

Software Engineer, Senior Staff - Kernels

d-Matrix

Santa Clara, California, United States (Hybrid)$180K – $300K Yearly
Software Engineering
Kernel Development
C++
Python
2mo agoNV

DFT Verification Engineer

NVIDIA

Yokne'am, Northern District, Israel (On-site)
DFT Engineering
ASIC Verification
DFT
DFT Verification
2w agoNV

Senior DFT Verification Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)
DFT Engineering
ASIC Verification
DFT
DFT Verification
3w agoNV

DFT Engineer

NVIDIA

Hyderabad, Telangana, India (Hybrid)
DFT Engineering
ASIC Design
Design for Test
Memory BIST
1mo agoTE

Static Timing Analysis (STA) Methodology Engineer

Tenstorrent

Santa Clara, California, United States (Hybrid)$100K – $500K Yearly
Physical Design
ASIC Design
Static Timing Analysis (STA)
PrimeTime