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CMOS/FinFET Processes Jobs

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6d agoNeuralink logoNE

Analog IC Design and Verification Engineer

Neuralink

Fremont, California, United States (On-site)$125K – $291K Yearly
Analog IC Design
Mixed-Signal Design
CMOS Circuit Design
Mixed-Signal IC Design
2mo agod-Matrix logoD-

Analog IC Design Intern

d-Matrix

Santa Clara, California, United States (Hybrid)$30 – $60 Yearly
Electrical Engineering
Analog IC Design
Analog IC Design
Cadence Virtuoso
3w agoNVIDIA logoNV

Physical Design Engineer

NVIDIA

Hsinchu, Hsinchu City, Taiwan (On-site)
Physical Design
VLSI
VLSI
Physical Design
2mo agoNVIDIA logoNV

Senior PDK Engineer

NVIDIA

Santa Clara, California, United States (Hybrid)$168K – $310.5K Yearly
Semiconductor Engineering
Electrical Engineering
PDK
VLSI Design
2mo agoNVIDIA logoNV

Senior Memory Mask Designer

NVIDIA

Bengaluru, Karnataka, India (Hybrid)
VLSI Design
Physical Design
IC Layout
CMOS
1mo agoTenstorrent logoTE

Staff, Design for Test Engineer (DFT)

Tenstorrent

Bengaluru, Karnataka, India (Hybrid)
DFT Engineer
ASIC Design
DFT
ATPG
4w agoTenstorrent logoTE

Design for Test Engineer

Tenstorrent

Santa Clara, California, United States (Hybrid)$100K – $500K Yearly
DFT and Test
ASIC Engineering
DFT
RTL