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Clock Tree Synthesis Jobs

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3mo agoNVIDIA logoNV

ASIC Clocks Verification Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$116K – $218.5K Yearly
ASIC Verification
Hardware Engineering
ASIC
Design Verification
3mo agoNVIDIA logoNV

ASIC Timing Engineer

NVIDIA

Santa Clara, California, United States (On-site)$116K – $218.5K Yearly
ASIC Engineering
Hardware Engineering
Static Timing Analysis
Timing Convergence
6d agoNeuralink logoNE

Physical Design and Verification Engineer

Neuralink

Austin, Texas, United States (On-site)$158K – $243K Yearly
Physical Design Engineering
ASIC Design
RTL to GDSII
Physical Design
1mo agoEtched logoET

Front-End Power Engineer

Etched

Cupertino, California, United States (On-site)
Hardware
ASIC Design
RTL Design
Verilog