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Hardware Qualification Engineering Jobs in Santa Clara, California, United States

Browse 17 Hardware Qualification Engineering jobs in Santa Clara, California, United States on Inference Jobs.

17 jobs
2w agoNVIDIA logoNV

Notebook Hardware Application Engineer

NVIDIA

Santa Clara, California, United States (On-site)$136K – $218.5K Yearly
Hardware Engineering
Application Engineering
Hardware Design
Circuit Design
2w agoNVIDIA logoNV

Senior Hardware Customer Quality Engineer

NVIDIA

Santa Clara, California, United States (On-site)$168K – $322K Yearly
Quality Engineering
Hardware Engineering
8D Problem Solving
Customer Quality
2w agoTenstorrent logoTE

SOC Emulation Engineer - Hardware Emulation Infrastructure

Tenstorrent

Santa Clara, California, United States (Hybrid)$100K – $500K Yearly
SoC
Hardware Engineering
Python
C++
2w agod-Matrix logoD-

Systems Hardware Engineer, Principal

d-Matrix

Santa Clara, California, United States (Hybrid)$150K – $300K Yearly
R&D - HW Systems Engineering
Hardware Design Engineering
PCIe Gen5/6
CXL
2w agoNVIDIA logoNV

Senior Software Engineer, Hardware Tools and Methodology Development

NVIDIA

Santa Clara, California, United States (Hybrid)$136K – $264.5K Yearly
Software Engineer
Senior Software Engineer
C++
Verilog
2w agod-Matrix logoD-

Post-Silicon Validation Engineer, Staff

d-Matrix

Santa Clara, California, United States (Hybrid)$155K – $258K Yearly
Post-Silicon Validation
Hardware Validation
Post-Silicon Validation
PCIe Gen5
2w agod-Matrix logoD-

Software Engineer, Developer and Qualification Tools

d-Matrix

Santa Clara, California, US or Remote (United States + 1 more)$132.1K – $234.4K Yearly
Software Engineer
Developer Tools
C/C++
Python
2w agoOpenAI logoOP

Hardware Tools Engineer

OpenAI

United States (Remote)$225K – $445K Yearly
Hardware Engineering
Software Engineering
Rust
C++
2w agoNVIDIA logoNV

Senior Systems Prototyping Engineer

NVIDIA

Santa Clara, California, United States (On-site)$168K – $310.5K Yearly
FPGA Engineering
ASIC Engineering
FPGA Prototyping
ASIC Design
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