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DPI Jobs in California, United States

Browse 47 DPI jobs in California, United States on Inference Jobs.

21-40 of 47 jobs
3w agoNeuralink logoNE

Digital IC Design Engineer Intern

Neuralink

Fremont, California, United States (On-site)$35 – $35 Hourly
Digital IC Design
RTL Design
SystemVerilog
C/C++
4w agoEtched logoET

IC Package Engineer

Etched

Cupertino, California, United States (On-site)
Hardware Engineering
Semiconductor Engineering
CoWoS
Substrate Layout
2w agoFigure logoFI

Helix AI Engineer, Android

Figure

San Jose, California, United States (On-site)$150K – $400K Yearly
Android Engineering
Mobile Development
Android NDK
C/C++
4w agoCrusoe logoCR

Senior Engineering Manager, Data Plane Systems

Crusoe

San Francisco, California, United States (On-site)$237.6K – $288K Yearly
Engineering Management
Networking
SDN
DPUs
2w agod-Matrix logoD-

PCB Design Engineer, Sr Staff

d-Matrix

Santa Clara, California, United States (On-site)$150K – $250K Yearly
PCB Layout Design
Hardware Engineering
Cadence Allegro
PCB Layout Design
4w agoGraphcore logoGR

Principal Hardware Diagnostics Engineer

Graphcore

Milpitas, California, United States (On-site)
Hardware Engineering
Diagnostics Engineering
Python
C++
4w agoCartesia logoCA

Design Engineer

Cartesia

San Francisco, California, United States (On-site)$180K – $250K Yearly
Design Engineering
Frontend Development
React
TypeScript
2w agoBraintrust logoBR

Design Engineer

Braintrust

San Francisco, California, United States (On-site)
Design Engineering
Frontend Development
UI Design
APIs
4w agoEtched logoET

PCB Hardware Validation Engineer

Etched

Cupertino, California, United States (On-site)
Hardware
Hardware Engineering
PCB
PCIe
4w agoEtched logoET

Emulation Software Engineer

Etched

Cupertino, California, United States (On-site)
Hardware Engineering
Embedded Software
C++
C
1w agoTenstorrent logoTE

AI Subsystems Physical Design Lead

Tenstorrent

Santa Clara, California, United States (Hybrid)$100K – $500K Yearly
Physical Design Engineer
ASIC Design
Physical Design
SoC Design
2w agoNeuralink logoNE

Analog IC Layout Engineer

Neuralink

Fremont, California, United States (On-site)$83K – $139K Yearly
Brain Interfaces Hardware
Analog IC Layout Engineering
Analog IC Layout
Mixed-Signal IC Layout
1d agoNVIDIA logoNV

Senior High-Speed IO Validation Engineer

NVIDIA

Santa Clara, California, United States (On-site)$136K – $258.8K Yearly
Hardware Validation Engineer
hsio-validation-engineer
PCIe
NVLink
4w agoFigure logoFI

Quality Engineering Technician, Metrology

Figure

San Jose, California, United States (On-site)$35 – $50 Hourly
Quality Engineering
Quality Control
GD&T
Quality Control
2w agoGoogle DeepMind logoGD

Staff AI Product Designer, GeminiApp Device Experience

Google DeepMind

Mountain View, California, United States (On-site)$178K – $265K Yearly
Product Design
UX Design
Product Design
User Interface Design
4w agod-Matrix logoD-

Post-Silicon Validation Engineer, Staff

d-Matrix

Santa Clara, California, United States (Hybrid)$155K – $258K Yearly
Post-Silicon Validation
Hardware Validation
Post-Silicon Validation
PCIe Gen5
4w agod-Matrix logoD-

Analog Design Engineer (L4/L5)

d-Matrix

Santa Clara, California, United States (Hybrid)$155K – $250K Yearly
Analog Design
Integrated Circuit Design
Analog Mixed Signal Design
Cadence
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